Conference
Open access
Oct 2026
Chip-Agnostic Hardware-Aware Training for ADC-Efficient BNNs in SOT-MRAM Crossbars
A SPICE-based hardware-aware training framework that injects end-to-end crossbar non-idealities directly into the BNN training flow and supports both chip-agnostic and chip-specific training for robust, generalized deployment across varying hardware instances without per-chip retraining.
B. L. Franco, Aymen Romdhane, J. Miquel et al.
· IEEE/IFIP International Conf... · 0 citations