Review
Open access
Aug 2026
A Survey of AES-256 and SHA-256 Hardware Architectures on FPGA
It can be deduced that an efficient resource usage, scalability and secure hardware implementation is possible by integrating the AES-256 and SHA-256 components into a modular FPGA architecture.
V. G, Bharathi Gururaj, Mruthika N. et al.
· International journal of com... · 0 citations