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S. Mande

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Open access Aug 2026

Dual Threshold Based Low Power MAC Unit for Convolution Operations

A low-power MAC architecture is presented, where both the multiplier and adder blocks are constructed using a dual-threshold voltage (Dual-Vth) full adder, and simulation results demonstrate a substantial reduction in leakage power compared to conventional MAC designs.

Kausar Fakir, S. Mande · 0 citations

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