FRISC-V and ApheleiaOS: Running an Operating System on an Extended RISC-V Core Implemented on an FPGA Platform

Abstract

This paper presents a complete computer system in which both the processor and the operating system were developed by students. The processor, FRISC-V, is a 32-bit RISC-V core that extends an educational RV32I design with the full privileged architecture: machine, supervisor and user modes, Sv32 hardware virtual memory with TLBs and a page-table walker, precise exceptions with delegation, and atomic instructions. The operating system, ApheleiaOS, is a Unix-like fork, a fairness-kernel and user space with copy-on-write based scheduler, an ext2 file system, signals, pipes, and more than 35 user programs. The integrated system runs on a low-cost FPGA at 50 MHz, where the core occupies about 4,400 LUTs. Verification included 672 directed and architectural tests; integration with the operating system exposed processor bugs that directed tests could not reach, while real hardware exposed assumptions in the operating system that emulators hide. The core additionally boots mainline Linux. By combining the RTL, SoC, boot chain and operating system on real FPGA hardware, the platform exposes hardware–software interactions that core-only and OS-only projects often miss. In particular, it evaluates the processor with a realistic kernel and user space, while evaluating the operating system against actual MMU, interrupt and peripheral behavior. The platform is intended for teaching and research in computer architecture and operating systems.