Low-Latency Stateless SNN Architecture with Localized Temporal Memory for Real-Time Edge Computing

Abstract

The swift development of edge computing and intelligent Internet of Things (IoT) systems has placed an increasing need on low-power and real-time neuromorphic processing architectures. Traditional Artificial Neural Networks (ANNs) are high computation accuracy with continuous processing that often needs large memory and power requirements, thus not being resource-constrained suitable with edge environments. Despite the benefits of Spiking Neural Networks (SNNs) as an energy-efficient event-based event-driven computational model, current SNN designs have problems of state decay, latency, untrustworthy time resolution, and greater complexity in combining SNNs with hybrid ANN-SNN systems. To overcome these issues, this paper gives a network-level stateless SNN model, where each neuron has a bounded local memory trace (distributed SRAM cells), without relying on centralized or external states. The presented system does not require the dependency on ANN but introduces localized memory in each neuron to maintain the information on time and enhance the continuity of state. The architecture uses rate-based rate encoding of spikes, Leaky Integrate-and-Fire (LIF) neuron computing, a distributed SRAM-based local memory retention, as well as time decoding by the use of an exponentially weighted moving average (EWMA) processing. Observed simulation results with MATLAB show how the proposed architecture would save several hundred times on latency, power requirements, and increase temporal stability and computational efficiency as compared with the existing hybrid neuromorphic systems. A compact VLSI implementation is also possible because of the modular and scalable architecture and thus makes the proposed architecture very appropriate with edge AI, smart surveillance, autonomous systems, and real-time embedded intelligence applications.