Determining Optimal FIB Access Points Using DFT-Guided Simulation Data

Abstract

The adoption of backside power delivery (BPD) for advanced semiconductor integrated circuit (IC) chips introduces significant electrical fault isolation (EFI) challenges. The lack of direct optical access to the device's FET layer severely impacts techniques such as laser voltage probing and imaging (collectively, LVX), photon emission microscopy (PEM), and dynamic and static laser stimulation (DLS, SLS). Electron beam probing (EBP) is actively being developed to replace LVX for BPD ICs. It offers a small spot size, narrow probe geometry, long working distance, and, crucially, the ability to measure voltage signals from both nets and cells. EBP, however, requires direct line of sight access to any nets/cells of interest, so its usefulness is heavily dependent on the ability to reach those nets/cells using focused ion beam (FIB) created holes. Most high-performance compute ICs will have more than 10 frontside metal layers. With local routing confined to the lowermost levels, reaching most signals of interest will be difficult. As a result, EBP on BPD ICs will require careful planning and searching for the best locations to create FIB access holes. In this work, we present a novel methodology that leverages design for test (DFT) data and simulation to identify optimal frontside FIB access points. Locations with access unobstructed by signal nets are preferred, but rare, with <20% for the designs that were analyzed thus far. The main new development in this work is the capability of differentiating between relevant nets for the test in question vs. nets that can be safely removed while maintaining the ability to stimulate the faulty logic for EBP. This increases the chances for FIB access upto 45%. These results highlight the effectiveness of the proposed technique for enabling scalable and practical EBP in the era of BPD.