An entangling gate for dual-rail erasure qubits
Abstract
Quantum error correction (QEC) will likely be required to realize the full potential of quantum computing, but comes with daunting hardware overheads and demands low gate errors on the physical qubits1, 2, 3–4. These requirements can be eased by engineering qubits with a strong error hierarchy, in which the most common noise channels are also the easiest to correct. Erasure qubits can achieve this when detectable leakage errors out of the computational subspace dominate over the residual Pauli errors5, 6, 7, 8, 9, 10–11, resulting in higher thresholds and improved scaling with code distance5,12,13. In practice, these advantages come to fruition only if the error hierarchy is preserved as much as possible throughout all gates and operations. Here we design and realize a two-qubit entangling gate for dual-rail cavity qubits, a type of erasure qubit encoded in a pair of superconducting microwave cavities7. Our experimental demonstration confirms that the error hierarchy is largely preserved during the gate. The gate is fast (about 500 ns duration) and shows low erasure rates of approximately 0.5% per gate, remaining Pauli errors below 0.1%, and a strong bias towards dephasing errors, in which bit-flips are practically non-existent at the 10−6 level. These results enable a faster path to error-corrected systems that rapidly suppress errors as they scale; a claim we support with our detailed surface code simulations. A fast, low-error entangling gate for dual-rail cavity erasure qubits preserves a strong error hierarchy, advancing scalable quantum error correction with substantially improved fault-tolerant performance.