Sep 2026· International journal of parallel programming· Vol 54· 0 citations· 117 references
TL;DR
The significance of compilers, how to optimize them, and a thorough comparison between the GNU compiler collection (GCC) and low-level virtual machine (LLVM) compilers are discussed.
The Trusted LLM (T-LLM) Compiler is presented, which proposes an advancement in compiler technology through a collaborative effort involving high-level LLM code transformations, traditional compilers, and verification tools and facilitates iterative code optimization efforts with verification strategies that enable cor...
Zahra Fazel, Sunanda Gamage, Shayan Shirahmad Gale Bagi et al.· 0 citations
All of these factors contribute to improved performance, lower latencies, and optimized use of resources and therefore, place RISC-V processing architectures as being the preferred architecture for the Intelligent Computing Solutions of the future.
Shaik Karimullah, J. Himabindhu· Digital Technologies Researc...· 0 citations
It is demonstrated that LLMs provided with specific optimization goals achieve better measured performance and validity rates when generating C code compared to creating computation pipelines and optimization schedules with established frameworks, suggesting that future development should explore alternative approaches...
Jiří Klepl, Matyáš Brabec, Martin Kruliš· 0 citations
This paper explores a new perspective: applying semantic-preserving compiler optimizations directly to intermediate representation (IR) before pointer analysis, which is modular, analysis-agnostic, and easily integrates with existing tools.
This paper explores copy-and-patch as a foundation for dynamic program analysis, and implements four analyses on top of an existing copy-and-patch JIT for R: code instrumentation, code coverage, performance profiling, and native debugging.
Martin Kocourek, Filip Křikava, Jan Vitek· 0 citations
This review bridges the gap by categorising and evaluating RISC-V advancements in key domains, including processor cores, system-on-chip architectures, ecosystem growth, software support, and hardware development platforms.
V. Preetha, C. V. Raghu· Sādhanā· 0 citations
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