Taurus is presented, a single-machine system for GNN inference on graphs that do not fit in RAM, supporting both full-graph inference and fanout-sampled inference, and outperforms the strongest layer-wise baseline, DGI.
Abstract
Graph Neural Network (GNN) inference on billion-scale graphs is challenging due to the large memory footprint of features and embeddings and high disk I/O costs in out-of-core settings. Existing distributed GNN systems incur high communication times and infrastructure costs, while disk-based GNN systems are primarily tailored to training and experience massive wasted reads during inference on the entire graph. We present Taurus, a single-machine system for GNN inference on graphs that do not fit in RAM, supporting both \textit{exact} full-graph inference and fanout-sampled inference. To avoid random and repeated feature gathers, Taurus reformulates layer-wise inference as source-centric broadcasts over sequential SSD scans, backed by a pipelined GPU-CPU-SSD hierarchy, topology-aware reordering, pending-message eviction, and a GPU-resident store for high-degree vertices. It further uses non-buffered sequential reads and GPU-backed writes to reduce page-cache pollution, host-memory pressure, and write overheads. On out-of-core graphs with up to $269M$ vertices, $4B$ edges, and $514$ GiB of features, Taurus outperforms the strongest layer-wise baseline, DGI, by $7$-$25\times$, and vertex-wise baselines by $40$-$140\times$.
FAST is presented, a holistic framework that accelerates end-to-end TGNN training by jointly optimizing sampling, memory I/O, and computation and designs thread-efficient graph operators tailored to sparse temporal subgraphs, improving GPU cache locality and reducing the latency of aggregation and edge softmax.
Connected Components (CC) is a foundational primitive in graph analytics, yet scaling it to billion-edge graphs on GPUs remains challenging as real-world graphs exceed GPU capacity. A naïve solution to oversubscribe GPU memory is UVM. However, UVM triggers excessive page faults under the irregular access patterns, while out-of-GPU-memory frameworks either introduce significant preprocessing overhead or suffer from random-access I/O bottlenecks. We present ExCC, an external-memory CC algorithm that keeps the full graph in host-pinned RAM and streams edge batches to the GPU through a three-phase pipeline of union-find merging. ExCC achieves predictable sequential I/O behavior across all phases, demonstrating average speedups of 1.98x over UVM, 4.03x over Subway, and 2.81x over EMOGI on billion-scale graphs.
Prajjwal Nijhara, D. Banerjee· IEEE International Symposium...· 0 citations
Sparse Matrix-Dense Matrix Multiplication (SpMM) is a dominant computational bottleneck in Graph Neural Network (GNN) inference and training. Representative studies report that SpMM consumes roughly 30% of the execution time in some Graph Convolutional Network (GCN) settings and over 80% in full-batch GraphSAGE training. Despite the rapid growth of GPU SpMM optimization techniques, spanning CUDA core kernels, Tensor Core acceleration, adaptive hybrid execution, autotuning, graph reordering, and framework integration, no dedicated survey has focused on this subfield. This paper presents the first such survey, covering 52 GPU-accelerated SpMM methods for GNN workloads published between 2019 and 2026. We constructed the corpus from IEEE Xplore, the ACM Digital Library, USENIX, arXiv, and Google Scholar, screening the studies first by title and abstract and then by full text. We included GPU-based SpMM kernels and GNN aggregation systems and excluded CPU-only, non-SpMM, abstract-only, and duplicate-version papers. We organize the literature into six technique categories and compare the methods using a ten-dimensional framework. Representative dimensions include sparse format, hardware target, parallelism strategy, load balancing, preprocessing cost, and open-source availability. We find that no single kernel dominates across all graph structures and that effective Tensor Core utilization reaches only 5–20% on irregular GNN matrices. Graph reordering is broadly beneficial, yielding gains of up to $43\times $ when it enables Sparse Tensor Core execution. Because the surveyed literature is overwhelmingly based on CUDA and Tensor Cores, our analysis is NVIDIA-centered. Nevertheless, we distinguish architecture-level insights that generalize to AMD and Intel accelerators from vendor-specific implementation details. We conclude with eight open challenges, including the no-single-winner problem, the Tensor Core utilization gap, standardized benchmarking, and graph-to-kernel compilation.
Tariq Habib Afridi, Muhammad Numan Khan, Young-Koo Lee· IEEE Access· 0 citations
CoRe-GNN is proposed, which performs both propagations in parallel at each layer: a coarsened inter-cluster term capturing long-range structure, and a local intra-cluster term preserving per-node discriminability.
Antonin Joly, Nicolas Keriven, Aline Roumy· 0 citations
SmartNIC-based in-network prediction is a practical complement to partitioning and compression techniques for communicationefficient full-graph GNN training at scale, and results indicate SmartNIC-based in-network prediction is a practical complement to partitioning and compression techniques for communicationefficient full-graph GNN training at scale.
Guofan Yu, Sitian Chen, Zhenheng Tang et al.· IEEE International Conferenc...· 0 citations
This work proposes Turbo, a first-of-its-kind in-network aggregation system that accelerates long-context inference by offloading query broadcast and attention aggregation to switches and introduces a rolling forward scheme that propagates states to enable cross-stage updates.
Ying Wan, Yuchen Xu, Chuwen Zhang et al.· Proceedings of the ACM SIGCO...· 0 citations