Skip to content

Author

D. SaiManojP

We have 2 of 2 papers

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Preprint Aug 2026

Lessons from the Hardware Hacking Competitions: Verification Techniques, Findings, and Insights

A multi-strategy vulnerability analysis methodology is presented, combining simulation-based verification, formal verification, lint analysis, Large Language Model-assisted bug detection, and coverage-guided hybrid fuzzing to derive practical lessons for pre-silicon security verification.

Sudipta Paria, Aritra Dasgupta, Raghul Saravanan et al. · 0 citations
Preprint Aug 2026

SoK: ARCUS: On the Efficiency and Efficacy of Hardware Fuzzing

This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarchitecture, and Register-Transfer Level (RTL). Our study examines key factors including input stimulus quality, mutation strategies, feedback...

Alenkruth Krishnan Murali, Raghul Saravanan, D. SaiManojP et al. · 1 citation

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.