A multi-strategy vulnerability analysis methodology is presented, combining simulation-based verification, formal verification, lint analysis, Large Language Model-assisted bug detection, and coverage-guided hybrid fuzzing to derive practical lessons for pre-silicon security verification.
Sudipta Paria, Aritra Dasgupta, Raghul Saravanan et al.· 0 citations
This survey presents a comprehensive overview of state-of-the-art hardware fuzzing research, examining how existing hardware fuzzing approaches differ in their fundamental approaches to test generation, simulation infrastructure, mutation strategy, coverage feedback, and bug detection.
This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarchitecture, and Register-Transfer Level (RTL). Our study examines key factors including input stimulus quality, mutation strategies, feedback...
Alenkruth Krishnan Murali, Raghul Saravanan, D. SaiManojP et al.· 1 citation
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