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Aug 2026

BHARAT-TPM: Micro-Architecture Design of AXI Enabled HMAC SHA-3 Hardware Accelerator for a RISC-V Trusted Platform Module

Trusted Platform Modules (TPMs) have become essential components of contemporary hardware security, and implementations must include cryptographically robust algorithms such as SHA-3 and HMAC. Dedicated hardware accelerators for these algorithms are needed for high performance in TPM operations, including key derivatio...

Adithyadev Mattada, Sheetal B. V., R. K et al. · 0 citations
Aug 2026

BHARAT-TPM: Design and ASIC Implementation of an SPI Based AXI Enabled AES Accelerator

Trusted Platform Modules (TPMs) serve as hardware roots of trust in secure System on Chip (SoC) environments, supporting essential security services such as secure key exchange, digital signatures, authentication, and cryptographic key management. Standalone validation of cryptographic hardware accelerators is an essen...

Mahima Agarwal, Bhavana B. L., R. K et al. · 0 citations
Aug 2026

BHARAT-TPM: Design and ASIC Implementation of an SPI Based AXI Enabled RSA-4096 Accelerator

Trusted Platform Modules (TPMs) serve as hardware roots of trust in secure System on Chip (SoC) environments, supporting essential security services such as secure key exchange, digital signatures, authentication, and cryptographic key management. Public key cryptographic algorithms such as the Rivest Shamir Adleman (R...

Mahima Agarwal, Divya B, R. K et al. · 0 citations

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