Author

Zhi-Hao Xu

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Open access Oct 2026

Fuzzing FPGA Synthesis and Simulation Tools via LLM-Generated Syntax-Valid HDL Codes

Field-Programmable Gate Array (FPGA) synthesis and simulation tools, such as Vivado, Quartus, Yosys, and Icarus Verilog, are key components of Electronic Design Automation (EDA) toolchains, translating high-level Hardware Description Language (HDL) designs into low-level gate netlists. However, defects in these compile...

He Jiang, Wen Zhao, Shi-Kai Guo et al. · 0 citations

Sep 2026

Rethinking LLM-aided RTL Code Optimization Via Timing Logic Metamorphosis

A metamorphic testing based evaluation method and a companion benchmark to measure the effectiveness of LLM-aided RTL code optimization show that LLM-aided methods effectively optimize logic operations and data paths, achieving lower or stable wire counts and area with delays near baseline.

Zhi-Hao Xu, Bi-Xin Li, Ran Yan et al. · ACM Transactions on Reconfig... · 0 citations