Understanding the Root Cause of Transient Failures in NAND-Type 3D Flash Memory

Abstract

NAND-type 3D Flash memory—built on vertically stacked memory cells to achieve higher storage density and enhanced performance—has become a foundational technology in modern data-storage systems and AI workloads. However, continued scaling to further increase density and improve device characteristics introduces substantial process-integration challenges. As dimensions shrink and architectural complexity rises, defect rates tend to increase, and more critically, many defects manifest transient or intermittent electrical behavior despite being physically observable. Although process improvements remain essential, understanding the failure mechanisms that drive these intermittent or transient behaviors is equally critical. Such insight is vital for defining effective screening strategies and stress methodologies that support time-to-market goals, while meeting stringent DPPM requirements. In this manuscript, we investigate three classes of transient failures originating from defects located in the row circuits, column circuitry, and peripheral logic—key functional blocks of a NAND-type 3D Flash memory chip outside the memory array. Beginning with the observed failure signatures, we analyze the underlying root causes and explain the physical mechanisms responsible for their transient behaviors.